1. Field of the Disclosure
This application relates generally to processing systems, and, more particularly, to operating points of a memory physical layer interface and a memory controller in a processing system.
2. Description of the Related Art
Processing systems such as a system-on-a-chip (SOC) use memory to store data or instructions for later use. For example, processing devices such as central processing units (CPUs), graphics processing units (GPUs), and accelerated processing units (APUs) can read instructions or data from memory, perform operations using the instructions or data, and then write the results back into the memory. Processing systems may include a memory physical layer interface for controlling access to a memory module such as dynamic random access memory (DRAM) that can be used to store information so that the stored information can be accessed by the processing devices during operation of the processing system. The memory physical layer interface in the APU is conventionally referred to as a “memory phy.” A memory controller is typically used to control operation of the memory physical layer interface.
The memory physical layer interface operates at a selected frequency and voltage, which may be referred to as the operating point of the memory physical layer interface. For example, the memory physical layer interface typically requires a relatively higher voltage to operate at a relatively higher frequency. The memory controller may therefore also be configured to operate at the operating point of the memory physical layer interface. Thus, setting the operating point of the memory physical layer interface may also include setting the operating point of the corresponding memory controller. The processing device can set the operating point of the memory physical layer interface and the memory controller to different predetermined combinations of frequency and voltage that may be referred to as performance states (or P-states) of the memory physical layer interface or the memory controller. For example, the memory physical layer interface may be able to operate at a first operating point that corresponds to relatively low frequency/voltage and a second operating point that corresponds to relatively high frequency/voltage. The first operating point is a low performance state because of the relatively low frequency and the second operating point is a high performance state because of the relatively high frequency.